Time is the Hunter Part Two

So, after sleeping on yesterday’s post, I had some scattered thoughts which I will add here.

Making everything an expression is a bit unweildy, so maybe the update_mystruct module could be written as:

module update_mystruct(
  clock clk,
  bit rst,
  my_struct counter,
) -> (
  my_struct counter_out,
);

  if rst {
    counter_out[T].is_upcounter = 0;
    counter_out[T].counter = 0;
  } else {
    counter_out[T].is_upcounter = if counter[T] == 100 {
      0
    } else if counter[T].is_upcounter == 0 {
      1
    } else {
      counter[T].is_upcounter
    };

    counter_out[T].counter = if counter[T].is_upcounter {
      counter[T].counter + 1
    } else {
      counter[T].counter - 1
    };
  }

endmodule

Also, mutable variables would be nice, and are workable maybe? So what about:

module update_mystruct(
  clock clk,
  bit rst,
  my_struct counter,
) -> (
  my_struct counter, // The output is the input!
);

  if rst {
    counter_out[T].is_upcounter = 0;
    counter_out[T].counter = 0;
  } else {
    if counter[T].counter == 100 {
      counter[T].is_upcounter = 0;
    }
    if counter[T].counter == 0 {
      counter[T].is_upcounter = 1;
    }

    if counter[T].is_upcounter {
      counter[T].counter += 1;
    } else {
      counter[T].counter -= 1;
    }
  }

endmodule

But then the question is, where is state held? In structs passed from the parent, or in the module itself? Because the above could also be written:

module update_mystruct(
  clock clk,
  bit rst,
) -> (
  bits[7:0] counter,
);

  bit is_upcounter;

  if rst {
    is_upcounter[T] = 0;
    counter[T] = 0;
  } else {
    if counter[T] == 100 {
      is_upcounter[T] = 0;
    }
    if counter[T] == 0 {
      is_upcounter[T] = 1;
    }

    if is_upcounter[T] {
      counter[T] += 1;
    } else {
      counter[T] -= 1;
    }
  }

endmodule

Which leads to this problem:

// Delays the value by 3 clocks
module delay3(
  clock clk,
  bit rst,
  bit input,
) -> (
  bit output,
);

  output[T] = input[T-3];

endmodule

// Usage:
bit previous_bit;
bit current_bit;
bits[7:0] value_tag;
bits[7:0] current_value_tag;

current_bit[T] = delay3(previous_bit[T]);
current_value_tag[T] = value_tag[T-3];

Uh-oh, we have one line saying that the value at time T equals some operation on a value at time T, and the line right after says T comes from T-3, but both lines have the same cycle delay! How do we solve that?